Pratap Reddy – CEO

Pratap Pratap Reddy is the CEO of Esencia Technologies and a member of the Board of Directors. A seasoned entrepreneur and a proven business leader for the past 18 years, Pratap has successfully built both Semiconductor chip & software companies. Prior to Esencia, Pratap was co-founder & CEO of 8KPC Inc, a storage hyper-converged appliance company. Pratap was co-founder & CEO of ArchPro Design Automation(acquired by Synopsys) and President/COO of Athena Semiconductors(acquired by Broadcom). Pratap was co-founder & COO of Sage Inc., a fabless chip company in the Video space which he helped take public (NASDAQ). Prior to his entrepreneurial career, Pratap held various executive & management positions at Synopsys & Data General. He holds a Bachelor’s degree in Electrical Engineering from NIT Warangal and a Master’s degree from the University of Iowa, Iowa City.


Ravi Satrawada – Founder and President

ravi_pic Ravi Satrawada served as Esencia’s CEO for the company’s first 8 years. Prior to founding Esencia he worked as a Senior Manager at RF MicroDevices, California. At RFMD he built several SOC Designs addressing 802.11, GPS and GSM products. Prior to RFMD, he was the Hardware Director of ComtTier Inc, California, a subsidiary of Andrew Corporation. At ComTier, Ravi and his team successfully deployed PCI Geo-stationary Satellite Modem products including two complex SoC’s implementing the statellite modem. Prior to ComTier Ravi Satrawada worked at Stanford Telecom, California and Wipro India. He carries over 15 years of experience in System Level Architecture and ASIC Design products and about 8 years of management experience in the ASIC Design and verification. His primary contribution as individual contributor has been on implementing complex DSP algorithms and network protocols used in PHY and MAC layers of Wireless LAN, Satellite, LMDS and WLL systems. Ravi Satrawada has also provided various consulting services to manyFortune 500 companies and start-ups including BroadCom, SiBeam, HStream and Amicus. Ravi Satrawada holds MS degree in Telecommunications from Indian Institute of Technology, Kharagpur, India.


Alpesh Oza – Founder and COO

alpesh_pic Alpesh brings 15 years of ASIC and SoC design experience. Before joining Esencia, Alpesh worked at Intel on several SoC products and led implementations of many complex ASIC designs. His primary expertise is in ASIC digital design in areas of Ethernet switch/routers, Microprocessor and Memory Subsystem design and Video compression. Alpesh holds a M.S.E.E from California State University and 6 patents in digital design of memory subsystems, configurable processor and Esencia EScala design platform



Miguel Guerrero – Founder and CTO

miguel_pic Miguel brings 16 years of industry experience to Esencia. He worked as Sr. architect at NVIDIA mobile division in the definition and modeling of several video encoder / decoders (H.264 / VC-1 and VP8) and other video processing related functions. Prior to that, Miguel worked as ASIC designer and architect for Intel in the networking division leading the development of high speed classification engines used in multi-gigabit Ethernet switches/router ASICs. Miguel brings extensive experience in Firmware development and systems design. Miguel holds 10+ patents in high speed look-up engines and holds an MS in Electrical Engineering from Universidad Politcnica de Valencia, Spain.


Karl Kaiser – VP of Engineering

karl_pic Karl Kaiser has 15+ years of experience as Engineering Manager in the semiconductors industry. He managed several product development groups designing complex portable wireless communication systems and devices. Prior of joining Esencia Mr. Kaiser held senior management positions at Apacewave a Silicon-Valley WiMax start-up, Altera and RF Micro Device. Between 1993 and 2000, Mr. Kaiser worked for Philips Semiconductors in the US and Europe in various roles. Mr. Kaiser holds a combined BS & MS in Electrical Engineering of the Swiss Federal Institute of Technology, Zurich, Switzerland.


Marc Mertsching – VP of Engineering

marc_pic Marc Mertsching is responsible for network systems engineering, embedded software, and wireless integrated circuit design at Esencia. Marc’s telecom experience began at Stanford Telecom where he and his teams designed systems, chips, and software for satellites and ground stations. Following Stanford Telecom, Marc was VP of Engineering of several startups, most notably Quantenna, where he led the pioneering development of the ground breaking and highly successful 802.11ac 4×4 MIMO chips and software products. Marc has led the development of products ranging from global Internet satellite networks distributed by Andrew Telecom to LTE chips and software shipped in Samsung phones. Marc studied Applied Mathematics and Electrical Engineering at UC Berkeley.


Manjeet Deol – Director of Operations

manjeet_picManjeet has been working at Esencia from its incorporation in 2006 directing its office operation including but not limted to Finance, Contracting, Compliance and Administration. Manjeet is also the front face for all Human Resources and Legal support interactions at Esencia. She has provided stability to Esencia’s rapid growth trajectory and its consistent profitability. Prior to Esencia, Manjeet served as a Sr. Accountant and HR manager for Pebble Solutions/MS9 which was successfully acquired by Ness. Manjeet worked closely with CFO and assisted all the M&A activity and ensured proper closure of the acquisition. Manjeet has done Bachelors in Commerce from Punjab University Chandigarh and Masters from HP University India.